Teaching
This page summarizes the courses I teach at the University of Rennes.
2026/2027
Research Project Advisor
Co-advising M2 Cybersecurity students working on the RowHammer attack on GPUs with Fernando Fernandes dos Santos and Angeliki Kritikakou.
- Students: Julien B., Florian S., Anatole B., and Ludovic M.
- Advising sessions: 19 hours
- Level: Cybersecurity Master (M2), Cyberschool, ISTIC, Univ. Rennes
Embedded System Security
- Resp.: Gwendal Patat
- Lab sessions: 30 hours
- Level: Cybersecurity Master (M1), Cyberschool, ISTIC, Univ. Rennes
- Summary: Introduction to embedded systems from a cybersecurity point of view including memory dumping, signal analysis with pirat buses and logic analyzers and reverse engineering.
Software/Hardware Interface (Interface Logiciel/Matériel)
- Resp.: Laurent Perraudeau
- Lab sessions: 15 hours
- Level: 3rd Year of Computer Science Bachelor (L3), ISTIC, Univ. Rennes
- Summary: Introduction to assembly language (RISC-V) and CPU architecture.
2025/2026
Embedded System Security
- Resp.: Gwendal Patat
- Lab sessions: 30 hours
- Level: Cybersecurity Master (M1), Cyberschool, ISTIC, Univ. Rennes
- Summary: Introduction to embedded systems from a cybersecurity point of view including memory dumping, signal analysis with pirat buses and logic analyzers and reverse engineering.
Software/Hardware Interface (Interface Logiciel/Matériel)
- Resp.: Laurent Perraudeau
- Lab sessions: 15 hours
- Level: 3rd Year of Computer Science Bachelor (L3), ISTIC, Univ. Rennes
- Summary: Introduction to assembly language (RISC-V) and CPU architecture.
Unix upgrade (Mise à niveau Unix)
- Resp.: Angeliki Kritikakou
- Tutorials: 3 hours
- Lab sessions: 15 hours
- Level: 3rd Year of Computer Science Bachelor for Business (L3 MIAGE), ISTIC, Univ. Rennes
- Summary: Introduction to Unix operating systems with command manipulation and bash scripting.
2024/2025
Embedded System Security
- Resp.: Joseph Paturel
- Lab sessions: 18 hours
- Level: Cybersecurity Master (M1), Cyberschool, ISTIC, Univ. Rennes
- Summary: Introduction to embedded systems from a cybersecurity point of view including memory dumping, signal analysis with pirat buses and logic analyzers and reverse engineering.
Software/Hardware Interface (Interface Logiciel/Matériel)
- Resp.: Laurent Perraudeau
- Lab sessions: 18 hours
- Level: 3rd Year of Computer Science Bachelor (L3), ISTIC, Univ. Rennes
- Summary: Introduction to assembly language (RISC-V) and CPU architecture.
Internships report review
- Number of students: 10
- Level: 3rd Year of Computer Science Bachelor (L3), ISTIC, Univ. Rennes
- Summary: Grading intership reports for L3 students.